Flat panel displays (hereinafter referred to as FPDs) such as liquid crystal panels and plasma display panels have been widespread as display apparatuses. Horizontal and vertical synchronization signals (hereinafter referred to as display horizontal and vertical synchronization signals) used for display on an FPD have frequencies different from those of horizontal and vertical synchronization signals (hereinafter referred to as input horizontal and vertical synchronization signals) of a video signal (an input video signal) supplied to the FPD.
The frequency of the display vertical synchronization signal of an FPD (hereinafter referred to as a display vertical synchronization frequency), which is the inverse of the cycle of a vertical synchronization signal interval, is a value specific to the display apparatus. The value specific to the display apparatus has an allowance for a vertical synchronization cycle, so that the range between a minimum vertical synchronization interval (Vs) and a maximum synchronization interval (Vl) is set (hereinafter referred to as a compensation interval) to allow the FPD to always provide display based on the input video signal.
Thus, the display vertical synchronization frequency of an FPD varies with the apparatus. Further, the frequency of the input vertical synchronization signal of the input video signal (hereinafter referred to as an input vertical synchronization frequency) may vary with the video source. Both frequencies usually do not match each other. Even the input vertical synchronization frequency of the same channel may sometimes vary.
Therefore, in Japanese Patent Application Laid-Open Publication No. 11-331638 (hereinafter referred to as document 1), the applicant has proposed a synchronization control circuit for synchronizing the display vertical synchronization signal with the input vertical synchronization signal. In this proposal, a process is performed in which, once the starting position of the vertical synchronization of the input video signal falls within the compensation interval allowed for a display apparatus, the display vertical synchronization signal is synchronized with the input vertical synchronization signal thereafter.
However, in the proposal of document 1, the frequency supplied to the display apparatus may vary with each field, and the frequency difference between fields is large especially while the phase difference does not fall within the compensation interval. Such a large frequency difference between fields causes concern for the video quality of the FPD. Further, in an FPD that drives display at a multiple speed, this frequency difference is noticeable and therefore the improvement of the video quality is essential.